| Feature | C612 Capability | Notes | | :--- | :--- | :--- | | | 8x PCIe 2.0 | Used for chipset-attached devices (NICs, SATA controllers, etc.) | | CPU PCIe Lanes | 40x PCIe 3.0 (per CPU) | Xeon E5 v3/v4, i7-6900/5960X. Dual socket = 80 lanes total. | | SATA Ports | 10x SATA 3.0 (6 Gb/s) | Supports RAID 0,1,10,5 (Intel RSTe for enterprise) | | USB Ports | 14x USB 2.0 (max) | Only 6x of these can be USB 3.0 (5 Gb/s) – a major limitation. | | Integrated LAN | 2x Gigabit MAC | Requires external Intel PHY (e.g., I210, I217) |
The C612 connects to the host processor(s) via the Direct Media Interface (DMI) 2.0. This interface effectively acts as a PCIe x4 link, providing up to 20 Gb/s of bidirectional bandwidth between the CPU and the PCH. While this bandwidth is shared among all PCH-connected devices, the architecture is optimized to prevent bottlenecks in typical server workloads.
| Feature | C612 Capability | Notes | | :--- | :--- | :--- | | | 8x PCIe 2.0 | Used for chipset-attached devices (NICs, SATA controllers, etc.) | | CPU PCIe Lanes | 40x PCIe 3.0 (per CPU) | Xeon E5 v3/v4, i7-6900/5960X. Dual socket = 80 lanes total. | | SATA Ports | 10x SATA 3.0 (6 Gb/s) | Supports RAID 0,1,10,5 (Intel RSTe for enterprise) | | USB Ports | 14x USB 2.0 (max) | Only 6x of these can be USB 3.0 (5 Gb/s) – a major limitation. | | Integrated LAN | 2x Gigabit MAC | Requires external Intel PHY (e.g., I210, I217) |
The C612 connects to the host processor(s) via the Direct Media Interface (DMI) 2.0. This interface effectively acts as a PCIe x4 link, providing up to 20 Gb/s of bidirectional bandwidth between the CPU and the PCH. While this bandwidth is shared among all PCH-connected devices, the architecture is optimized to prevent bottlenecks in typical server workloads.